Operation of high speed electronic components produces unwanted heat. For example, high speed computer processor components such as microprocessors, graphics processors and the like generate unwanted heat that must be removed or otherwise reduced for efficient operation. For instance, as indicated in U.S. Pat. No. 5,598,320, it is commonly known that the current generation of P5 microprocessor chips, such as Intel Corporation's Pentium.RTM. Pro microprocessor, generate a significant amount of heat during operation.
To meet ever higher requirements for computing power, designs for semiconductor modules, such as processors, continue to evolve, becoming more complex and operating at ever higher speeds. More complex designs typically integrate greater and greater numbers of transistors, which each contribute to generation of more heat during operation. As each transistor is operated at higher speeds, heat generation is further increased.
It is important to provide heat removal/reduction for such electronic components to allow for a lower operating temperature, higher operating speeds and greater computing power. If this heat is not adequately removed/reduced, the increased temperatures generated by electronic components, such as processors, can damage the components. Accordingly, it is advantageous to remove/reduce the generated heat to allow for a lower operating temperature not only to enable better performance of the electronic components but also to provide higher reliability and availability of such components.
Various circuit board arrangements and cooling schemes are known in the prior art. In discussing the prior art arrangements, the desire and importance of providing a voltage regulator (or power converter module), such as a DCDC converter, and memory in close proximity to the processor should be kept in mind. For instance, it is important to have the voltage regulator arranged in close proximity to the processor because as the voltage regulator is moved further away from the processor the inductance of the circuit increases and the capacitance supplied to the processor by the voltage regulator decreases, thereby often requiring additional components to provide such capacitance. Additionally, it is important to have memory arranged in close proximity to the processor because as memory is moved further away from the processor the latency and signal integrity for the memory is reduced such that the performance of the circuit may be negatively impacted. That is, because of the time it takes for the electrical signals to travel a relatively far distance between the memory and processor, the latency and signal integrity may be negatively effected. It will be understood that it may be advantageous to arrange other electronic components in relatively close proximity to the processor, as well.
An example of one prior art arrangement/cooling scheme is illustrated in FIG. 1. FIG. 1 illustrates a traditional circuit board layout 100 comprising a connector 102 at one end of the board 100 for coupling the board 100 to, for example, a midplane or backplane, a processor 104 that is cooled with a heat sink 106, capacitance 108 to act as a power reservoir for the processor 104, memory 110, and a voltage regulator, such as DCDC converter 112 that may also be cooled with a heat sink 114. With this configuration, the DCDC converter 112 is arranged relatively far away from the processor 104, but the memory 110 is arranged in fairly close proximity to the processor 104. Because the DCDC converter 112 is arranged relatively far from the processor 104, capacitance 108 having a relatively close proximity to the processor 104 is required. Suppose, for instance, that there is a sudden need for a step load, wherein the processor is suddenly required to "work" especially hard, thus requiring a surge of power. Since the DCDC converter 112 is unable to provide the needed power surge quick enough because of its distance from the processor 104, the capacitance 108 provides the necessary surge of power by discharging its capacitors. In this configuration, memory 110 is arranged in fairly close proximity to the processor 104, although the memory-to-processor route (i.e., the distance which electrical signals are required to travel between the memory 110 and the processor 104) is slightly compromised because of the space required for the capacitance 108.
The configuration illustrated in FIG. 1 is problematic because it requires a relatively large assembly design to allow for the required components arranged in the manner illustrated thereby, and such a large design is typically costly and not easy to manufacture. Also, additional component(s) are required on the circuit board to provide local capacitance 108 adjacent to the processor 104. Separate cooling components (heat sink 106 and heat sink 114) are utilized for the processor 104 and the DCDC converter 112, thus further adding to the number of components required, thereby further increasing the cost of the circuit board. Moreover, as discussed above, the memory-to-processor route is slightly compromised because of the space required for the capacitance 108, which may negatively impact the system's performance.
FIG. 2 illustrates another example of a prior art arrangement/cooling scheme. FIG. 2 illustrates a circuit board layout 200 comprising a connector 202 at one end of the board 200 for coupling the board 200 to, for example, a midplane or backplane, a processor 204, capacitance 208 to act as a power reservoir for the processor 204, memory 210, and a voltage regulator, such as DCDC converter 212 that is cooled with a heat sink 214. In this configuration, an evaporator 206, compressor 216, and condenser 218 are utilized to perform "sub cooling" of the processor 204 (i.e., cooling the processor 204 below ambient temperature) to enhance the processor's performance (e.g., increased frequency), as is well known in the art, as opposed to the configuration of FIG. 1 wherein a heat sink is utilized to cool the processor 204 to an above-ambient temperature. With the configuration illustrated in FIG. 2, the DCDC converter 212 is again arranged relatively far away from the processor 204, but the memory 210 is arranged in fairly close proximity to the processor 204. Because the DCDC converter 212 is arranged relatively far from the processor 204, capacitance 208 having a relatively close proximity to the processor 204 is required to provide a "power reservoir," as with the configuration of FIG. 1. In this configuration, memory 210 is arranged in fairly close proximity to the processor 204, although the memory-to-processor route is slightly compromised because of the space required for the capacitance 208.
The configuration illustrated in FIG. 2 is problematic because it requires even a larger assembly design than that required for the configuration of FIG. 1 in order to allow for the additional required components arranged in the manner illustrated in FIG. 2. Such a large design is typically costly and not easy to manufacture. Also, additional component(s) are required on the circuit board to provide local capacitance 208 adjacent to the processor 204. Again, separate cooling components are utilized for the processor 204 and the DCDC converter 212, thus further adding to the number of components required, thereby further increasing the cost of the circuit board. Moreover, as discussed above, the memory-to-processor route is slightly compromised because of the space required for the capacitance 208, which may negatively impact the system's performance.
FIG. 3 illustrates still another example of a prior art arrangement/cooling scheme. FIG. 3 illustrates a circuit board layout 300 comprising a connector 302 at one end of the board 300 for coupling the board 300 to, for example, a midplane or backplane, a processor 304 that is cooled with a heat sink 306, a voltage regulator, such as DCDC converter 308 that may also be cooled with a heat sink 310, and memory 312. With this configuration, the DCDC converter 308 is arranged in relatively close proximity to the processor 304, but the memory 312 is arranged far away from the processor 304. Because the DCDC converter 308 is arranged relatively close to the processor 304, additional capacitance is not needed in this configuration, thereby somewhat reducing the number of components required on the circuit board. However, this configuration compromises the proximity of memory 312 to processor 304 in order to arrange the DCDC converter 308 in close proximity to the processor 304. Because memory 312 is arranged far from the processor 304, the memory-to-processor route is greatly compromised because of the space required for the DCDC converter 308, which may negatively impact latency and signal integrity.
The configuration illustrated in FIG. 3 is problematic because it requires a relatively large assembly design to allow for the required components arranged in the manner illustrated thereby, and such a large design is typically costly and not easy to manufacture. Also, separate cooling components (heat sink 306 and heat sink 310) are utilized for the processor 304 and the DCDC converter 308, thus further adding to the number of components required, thereby further increasing the cost of the circuit board. Moreover, as discussed above, the memory-to-processor route is greatly compromised because of the space required for the DCDC converter 308 between the memory 312 and the processor 304, which may negatively impact the system's performance.
FIG. 4 illustrates yet another example of a prior art arrangement/cooling scheme. FIG. 4 illustrates a circuit board layout 400 comprising a connector 402 at one end of the board 400 for coupling the board 400 to, for example, a midplane or backplane, a processor 404, a voltage regulator, such as DCDC converter 408 that is cooled with a heat sink 410, and memory 412. In this configuration, an evaporator 406, compressor 414, and condenser 416 are utilized to perform sub cooling of the processor 404 (i.e., cooling the processor 404 below ambient temperature) to enhance the processor's performance (e.g., increased frequency), as is well known in the art, as opposed to the configuration of FIG. 3 wherein a heat sink is utilized to cool the processor 304 to an above-ambient temperature. With this configuration illustrated in FIG. 4, the DCDC converter 408 is arranged in relatively close proximity to the processor 404, but the memory 412 is arranged far away from the processor 404. Because the DCDC converter 408 is arranged relatively close to the processor 404, additional capacitance is not needed in this configuration, thereby somewhat reducing the number of components required on the circuit board. However, as with the configuration of FIG. 3, this configuration compromises the proximity of memory 412 to processor 404 in order to arrange the DCDC converter 408 in close proximity to the processor 404. Because memory 412 is arranged far from the processor 404, the memory-to-processor route is greatly compromised because of the space required for the DCDC converter 408, which may negatively impact latency and signal integrity.
The configuration illustrated in FIG. 4 is problematic because it requires a relatively large assembly design to allow for the required components arranged in the manner illustrated thereby (even larger than the configuration illustrated in FIG. 3), and such a large design is typically costly and not easy to manufacture. Also, separate cooling components are utilized for the processor 404 and the DCDC converter 408, thus further adding to the number of components required, thereby further increasing the cost of the circuit board. Moreover, as with the configuration of FIG. 3, the memory-to-processor route is greatly compromised because of the space required for the DCDC converter 408 between the memory 412 and the processor 404, which may negatively impact the system's performance.
Generally as cooling schemes of the prior art become more efficient at removing heat, the mechanisms to implement the schemes typically become larger, heavier, bulkier and more difficult to arrange in computer systems. In some processor cooling schemes of the prior art, the bulky mechanisms for implementing the schemes interfere with advantageous arrangement and placement of the companion voltage regulator and memory for highest possible operating speed. For example, such bulky mechanisms have interfered when designers have pursued a substantially co-planar arrangement of the processor and voltage regulator extending across the surface of a motherboard. This problem is exacerbated by the introduction of additional bulky mechanisms for cooling the voltage regulator.
Thus, while high speed computer systems are blessed with tremendous computing power, they are also twice cursed: first they are cursed with the demanding cooling requirement of the high speed processors; and second they are cursed with even more demanding requirements for one or more specialized companion voltage regulators and high speed memories carefully arranged proximate to the high speed processors.